| 来源类型 | Working Paper |
| 规范类型 | 报告 |
| DOI | 10.3386/w24553 |
| 来源ID | Working Paper 24553 |
| Measuring Moore\u2019s Law: Evidence from Price, Cost, and Quality Indexes | |
| Kenneth Flamm | |
| 发表日期 | 2018-04-30 |
| 出版年 | 2018 |
| 语种 | 英语 |
| 摘要 | “Moore’s Law” in the semiconductor manufacturing industry is used to describe the predictable historical evolution of a single manufacturing technology platform that has been continuously reducing the costs of fabricating electronic circuits since the mid-1960s. Some features of its future evolution were first correctly predicted by Gordon E. Moore in 1965, and Moore’s Law became an industry synonym for continuous, periodic reduction in both size and cost for electronic circuit elements. This paper develops develops some stylized economic facts, reviewing why and how this progression in manufacturing technology delivered a 20 to 30 percent annual decline in the cost of manufacturing a transistor, on average, as long as it continued. Other characteristics associated with smaller feature sizes would be expected to have additional economic value, and historical trends for these characteristics are reviewed. Lower manufacturing costs alone pose no special challenges for price and innovation measurement, but these other benefits do, and motivate quality adjustment methods when semiconductor product prices are measured. Empirical evidence of recent changes to the historical Moore’s Law trajectory is analyzed, and shows a slowdown in Moore’s Law as measured by prices for the highest volume products: memory chips, custom chip designs outsourced to dedicated contract manufacturers (foundries), and Intel microprocessors. Evidence to the contrary, which relates primarily to Intel microprocessors is reviewed, as are economic reasons why Intel microprocessor prices might behave differently from prices for other types of semiconductor chips. A computer architecture textbook model of how chip characteristics affect microprocessor performance is specified and tested in a structural econometric model of microprocessor computing performance. This simple econometric model, using only a small set of explanatory chip characteristics, explains 99% of variance across processor models in performance on commonly used performance benchmarks. This small set of characteristics should clearly be included in any hedonic model of computer or processor prices. Most of these chip characteristics also affect chip production cost, and therefore have an additional rationale for inclusion in a hedonic model that is separate from their demand-side effects on computer performance metrics relevant to users. |
| 主题 | Industrial Organization ; Industry Studies ; Development and Growth ; Innovation and R& ; D |
| URL | https://www.nber.org/papers/w24553 |
| 来源智库 | National Bureau of Economic Research (United States) |
| 引用统计 | |
| 资源类型 | 智库出版物 |
| 条目标识符 | http://119.78.100.153/handle/2XGU8XDN/582226 |
| 推荐引用方式 GB/T 7714 | Kenneth Flamm. Measuring Moore\u2019s Law: Evidence from Price, Cost, and Quality Indexes. 2018. |
| 条目包含的文件 | ||||||
| 文件名称/大小 | 资源类型 | 版本类型 | 开放类型 | 使用许可 | ||
| w24553.pdf（2104KB） | 智库出版物 | 限制开放 | CC BY-NC-SA | 浏览 | ||
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